Sital delivers its ARINC 429 IP core, now with DO-254 certification documentation.
ARINC 429 is a serial protocol used in most commercial aircrafts for connecting between the aircraft’s avionics systems.
DO-254 is a formal safety standard that applies to complex aircraft hardware. It provides guidance for the design and development of electronic hardware for airborne systems.
DO-254 defines five design assurance levels (DALs) of compliance, which determines the effect a failure of the hardware will have on the operation of the aircraft. Level A is the most severe, defined as "catastrophic" (eg loss of the aircraft), while a failure of Level E hardware will not affect the safety of the aircraft.
The main regulations which must be followed are requirements capturing and tracking throughout the design and verification process. Meeting DAL-A compliance for complex electronic hardware requires a much higher level of verification and validation than DAL-E compliance.
Sital now delivers ARINC 429 soft IP core for Tx and Rx channels that can be certified with DO-254 DAL-A through DAL-E. Along with this IP, Sital provides a testing environment and user documentation which helps the user instantiate the IP into his/hers own system design.
Sital also provides a set of documents for the IP, which the user is required to present to the certification authorities.
Example for these documents are: Plan for Hardware Aspects of Certification (PHAC), which is the prime deliverable document required for achieving DO-254 certification, hardware conceptual/detailed design and implementation as well as hardware validation and verification to provide assurance that all requirements are met, tested, verified and captured.
The ARINC 429 IP core is provided in two independent modules, for Transmitter and Receiver, enabling users to easily implement the required number of transmitters and receivers in their design.
Features summary of the Sital ARINC 429 IP core:
- ARINC 429 specification compatible
- Separated channels for ARINC 429 data transmit and receive
- Programmable label recognition with 256 Labels for each Receiver
- Programmable parity: Even,Odd or No-parity (32nd bit as data)
- Programmable data rate on each channel (12.5/100Kbps)
- Supports standard ARINC 429 line drivers/receivers with two bits data and slope bit controls
- 32 bits wide, programmable depth, separated FIFO buffers for transmit and receive
- Includes noise filtering mechanism to enhance receiver robustness
- Multiple running clock options to reduce design time domains
- Provided with full verification environment
- Very simple bus interface
- Small FPGA area utilisation